Significant advances in the ability to provide optical modulation in a silicon-based platform have been made, as disclosed (for example) in U.S. Pat. No. 6,845,198, issued to R. K. Montgomery et al. on Jan. 18, 2005 and assigned to the assignee of the present application. The Montgomery et al. modulator is based on forming a gate region of a first conductivity type to partially overlap a body region of a second conductivity type, with a relatively thin dielectric layer interposed between the contiguous portions of the gate and body regions. The doping in the gate and body regions is controlled to form lightly doped regions above and below the dielectric, thus defining the active region of the device. Advantageously, the optical electric field essentially coincides with the free carrier concentration area in the active device region. The application of an electrical modulation signal thus causes the simultaneous accumulation, depletion or inversion of free carriers on both sides of the dielectric, resulting in operation at speeds in excess of 10 GHz.
FIG. 1 illustrates one exemplary arrangement of a prior art SOI-based electro-optic modulator device 1 as disclosed in the Montgomery et al. reference. As shown, prior art modulator 1 is formed within an SOI structure 2 including a silicon substrate 3, buried oxide layer 4 and a surface silicon layer 5 (hereinafter referred to as “SOI layer 5”). In most cases, SOI layer 5 comprises single crystal silicon having a thickness less than one micron, in order to maintain the desired degree of optical mode confinement (e.g., single mode) within the completed structure. At least a portion of SOI layer 5 in the area defining the active device structure is doped to exhibit a predetermined conductivity (in this case, n-doped). A separate silicon layer 6 (usually formed of polysilicon) is disposed over the doped portion of SOI layer 5 in the overlapping manner shown in FIG. 1, where silicon layer 6 is doped to be of the opposite conductivity type (in this case, p-doped). A thin dielectric layer 7 is located between the doped polysilicon layer 6 and doped SOI layer 5, with this tri-layer structure defining the active region 8 of prior art modulator 1.
As mentioned above, free carriers will accumulate and deplete on either side of dielectric layer 7 as a function of voltages applied to SOI layer 5 (VREF5) and/or polysilicon layer 6 (VREF6). The modulation of the free carrier concentration results in changing the effective refractive index in active region 8, thus introducing phase modulation of an optical signal propagating along a waveguide formed along active region 8 (the waveguide being along the y-axis, in the direction perpendicular to the paper). FIG. 2 is a cut-away side view of structure 1 (in the y-z plane), illustrating the direction of propagation of an optical signal along the length L of active region 8 of SOI-based modulator device 1. It is clear that with this prior art structure the physical length L of active region 8 is identical to the interaction length between the optical field and free carrier modulation.
The interaction length of such a prior art device thus determines the amount of modulation that is able to be produced. In SISCAP devices, it is desired to maximize the overlap of the optical field intensity with the free carrier modulation region. Additionally, it is desirable to reduce the overall length of the device to reduce optical loss, where this requirement is seen to be at odds with the desire to increase the amount of modulation. Thus, a need remains in the art to develop a SISCAP structure that accommodates both of these concerns.